HiLink, Datasheet
Part: higpu-link-switchd ·
Type: GPU-to-GPU fabric interconnect ·
Version: `v0.1.0` ·
Repo: PacketFive/HiLink
1. Overview
HiLink is the dedicated GPU-to-GPU fabric of the HiCAIN platform, modelling
an NVSwitch/NVLink-class interconnect separate from the RoCE/IB NIC fabric. It
provides a frame-based protocol for high-bandwidth data movement, doorbells,
atomics, and collective operations between HiGPU
endpoints. Same-host GPU pairs use an ivshmem shared-memory fast path; cross-host
traffic is switched by the higpu-link-switchd daemon.
Key features
- Purpose-built GPU fabric, independent of the RoCE/IB NIC fabric.
- Frame-based protocol with data, doorbell, atomic, and collective message types.
- Collective offload types for AllReduce / AllGather (HiCCL).
- ivshmem shared-memory fast path for same-host GPU pairs (NVLink-like latency).
- Switched cross-host path via
higpu-link-switchd.
- Automatic FDB learning from DISCOVERY frames; discovery + keepalive.
2. Fabric diagram
flowchart TB
subgraph LSW["higpu-link-switchd (8 fabric ports)"]
direction TB
CORE["Forwarding core<br/>FDB learn/lookup by GPU ID<br/>hilink_loop.c"]
MGMT["Mgmt API<br/>JSON / UNIX socket"]
ISL["port 8<br/>inter-switch link"]
CON["port 9<br/>console / OTel"]
CORE --- MGMT
CORE --- ISL
CORE --- CON
end
G0["GPU 0 endpoint"] -->|UDS SEQPACKET| CORE
G1["GPU 1 endpoint"] -->|UDS SEQPACKET| CORE
G7["GPU 7 endpoint"] -->|UDS SEQPACKET| CORE
classDef c fill:#fce7f3,stroke:#9d174d,color:#831843
classDef g fill:#dbeafe,stroke:#1e40af,color:#1e3a8a
class CORE,MGMT,ISL,CON c
class G0,G1,G7 g
3. Functional specifications
| Parameter |
Value |
| Fabric ports (GPU links) |
8 default (configurable, max 32) |
| Inter-switch link |
port 8 |
| Console / OTel port |
port 9 |
| Frame header size |
12 bytes (packed) |
| Frame magic |
0x484C ("HL") |
| Protocol version |
0x01 |
| Max frame |
64 KB (12 B header + payload) |
| GPU endpoint lanes |
4 (default, see HiGPU) |
| Concurrency model |
Single-threaded epoll loop |
| Forwarding |
FDB learned by source GPU ID; unicast, or fan-out on 0xFFFF |
4. Wire protocol
| Field |
Size |
Notes |
| Magic |
2 B |
0x484C |
| Version |
1 B |
0x01 |
| Type |
1 B |
message type (below) |
| Src GPU ID |
2 B |
source endpoint |
| Dst GPU ID |
2 B |
destination endpoint (0xFFFF = broadcast) |
| Length |
4 B |
payload length |
| Payload |
variable |
message body |
4.2 Frame types
| Type |
Value |
Purpose |
HILINK_TYPE_DATA |
0x01 |
Peer-to-peer data copy |
HILINK_TYPE_DOORBELL |
0x02 |
Notification |
HILINK_TYPE_ATOMIC |
0x03 |
Atomic operation |
HILINK_TYPE_COLLECTIVE_REDUCE |
0x04 |
AllReduce (HiCCL) |
HILINK_TYPE_COLLECTIVE_GATHER |
0x05 |
AllGather (HiCCL) |
HILINK_TYPE_DISCOVERY |
0x06 |
GPU discovery / FDB learning |
HILINK_TYPE_LINK_KEEPALIVE |
0x07 |
Keep-alive probe |
5. Daemon internals
| Subsystem |
Source |
Responsibility |
| Entry / CLI |
main.c |
Argument parsing, startup |
| Core |
hilink_switch.c |
hilink_switch_init() / _destroy(), port + FDB setup |
| Event loop |
hilink_loop.c |
hilink_switch_run(), RX parse, routing, TX |
| Management |
hilink_mgmt.c |
hilink_mgmt_handle(), JSON commands |
| Protocol defs |
include/hilink_proto.h |
Header + type constants |
FDB functions: hilink_fdb_learn(), hilink_fdb_lookup(),
hilink_fdb_dump().
Routing: RX on SOCK_SEQPACKET, parse and validate 12 B header, learn
src_gpu → port; forward by dst_gpu FDB lookup (unicast), or fan out to all
enabled ports except ingress when dst_gpu == 0xFFFF. Drop counters track
invalid headers and no-route frames. TX uses send(..., MSG_EOR).
epoll event tags: EV_TAG_PORT_LISTEN, EV_TAG_PORT_CLIENT,
EV_TAG_MGMT_LISTEN, EV_TAG_MGMT_CLIENT (packed with port ID and FD).
6. Management API (JSON)
| Command |
Purpose |
{"cmd":"set_link_state","port":N,"enabled":true\|false} |
Enable/disable a port |
Response: {"status":"ok"\|"error"}. FDB learning is automatic from DISCOVERY
frames and valid source GPU IDs.
7. Interfaces
| Interface |
Description |
| Same-host transport |
ivshmem (POSIX shared memory + UNIX socket signalling) |
| Cross-host transport |
UNIX domain socket (SOCK_SEQPACKET) to the switch |
| GPU-side endpoint |
MMIO mailboxes in HiGPU BAR0 |
| Run directory |
/var/run/hilink/ |
8. Software support
| Item |
Value |
| Switch daemon |
higpu-link-switchd (C / GNU C) |
| Management CLI |
hilink-cli |
| Design reference |
HiLink Switch Design |
| Item |
Value |
| Repo |
PacketFive/HiLink |
| Submodule path |
src/hilink (in PacketFive/vdc) |
| Version |
v0.1.0 |
| Language |
C (GNU C) |
10. Revision history
| Revision |
Date |
Notes |
| A |
2026-07-05 |
Initial datasheet |
| B |
2026-07-05 |
Added fabric diagram, full frame-type table, daemon internals |